Personal statement
I completed both undergraduate and postgraduate studies at Strathclyde. I joined the University staff in 2007 as a Research Fellow, and switched title to Teaching Fellow in 2013 (although retaining interests in research and knowledge exchange), and was promoted to Senior Teaching Fellow in 2017.
My work focuses on the hardware implementation of Digital Signal Processing (DSP) systems, primarily with an emphasis on communications applications, and Software Defined Radio (SDR). Working in a field of direct relevance to industry really appeals to me. My focus is on Field Programmable Gate Arrays (FPGAs) and related technologies, and the design tools and methods that support them.
My teaching role involves taking classes on Hardware Description Language (HDL) design, Simulink-based design, and FPGAs, focusing on practical skills that will equip graduates for roles in industry. I am also involved in authoring training materials for the wider academic community (and beyond), and I have co-authored several books on my areas of interest.
Teaching
I currently teach sections of three different classes... Firstly "Digital Electronics Systems" (a 2nd year class), in which students are introduced to the VHDL hardware description language, digital device technologies, and the concept of a design flow. Secondly, the digital part of "Analogue and Digital Systems Design", wherein students learn further VHDL skills and start working with block based design tools. The third is "DSP and FPGA Based Embedded Systems Design", in which I teach the FPGA-focused section of the class. Additionally, I am involved in supervising student projects in these areas.
Professional activities
- 32nd International Conference on Field Programmable Logic and Applications
- Speaker
- 1/9/2022
- The 30th IEEE International Symposium on Field-Programmable Custom Computing Machines
- Participant
- 16/5/2022
- The 30th IEEE International Symposium on Field-Programmable Custom Computing Machines
- Participant
- 16/5/2022
- GHz RF Sampling for Radio Spectrum Monitoring using the Xilinx RFSoC
- Contributor
- 28/10/2021
- Spectrum Monitoring for Sharing - first principles SDR design and implementation
- Speaker
- 16/9/2021
- EUSIPCO
- Speaker
- 23/8/2021
More professional activities
Projects
- 5G New Radio PHY Layer Implementation
- Stewart, Robert (Principal Investigator) Crockett, Louise Helen (Co-investigator)
- 01-Jan-2021 - 31-Jan-2025
- Doctoral Training Partnership (DTP 2016-2017 University of Strathclyde) | McTaggart, Blair
- Crockett, Louise Helen (Principal Investigator) Stewart, Robert (Co-investigator) McTaggart, Blair (Research Co-investigator)
- 01-Jan-2018 - 01-Jan-2023
- Doctoral Training Partnership 2018-19 University of Strathclyde | MacLellan, Andrew
- Stewart, Robert (Principal Investigator) Crockett, Louise Helen (Co-investigator) MacLellan, Andrew (Research Co-investigator)
- 01-Jan-2018 - 01-Jan-2023
- Doctoral Training Partnership 2018-19 University of Strathclyde | McLaughlin, Lewis
- Crockett, Louise Helen (Principal Investigator) Stewart, Robert (Co-investigator) McLaughlin, Lewis (Research Co-investigator)
- 01-Jan-2018 - 01-Jan-2023
- Doctoral Training Partnership (DTP 2016-2017 University of Strathclyde) | Ramsay, Craig
- Crockett, Louise Helen (Principal Investigator) Stewart, Robert (Co-investigator) Ramsay, Craig (Research Co-investigator)
- 01-Jan-2017 - 01-Jan-2021
- Doctoral Training Partnership (DTP - University of Strathclyde) | Northcote, David
- Crockett, Louise Helen (Principal Investigator) Murray, Paul (Co-investigator) Northcote, David (Research Co-investigator)
- 01-Jan-2015 - 01-Jan-2019
More projects
Address
Electronic and Electrical Engineering
Royal College
Royal College
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